**Definition**: Programmable Logic Array, abbreviated as PLA is a programmable logic device having programmable AND gates and OR gates. These devices are basically programmed to implement the Boolean functions.

The fundamental components of PLAs are input buffer, programmable AND gate matrix and programmable OR gate matrix.

PLA allows the implementation of any random boolean function present in SOP form using programmable technique.

### Components of PLA

**Input Buffer**: Basically buffers at the input are used to reduce the loading of the sources. The buffer generates the inverted and non-inverted input as its output. Input buffers are basically a combination of NOT gates.

*Number of input buffers = Total number of variables present in a boolean expression*

The figure below shows the input buffer for a random input X:

The simplified form of the above figure is shown below:

As we can that the simplified figure consists of two NOT gates. And the combinations of two NOT gates produce both inverted as well as non-inverted input as output. This is so because in one case the input is complemented twice thus provides the originally provided input. While in another case the output is taken only after the first NOT gate. Thereby providing complemented input as output.

**AND matrix**: As we know that AND logic gate performs multiplication. So, AND matrix is used to give product terms as output. Basically each AND gate in the circuit provides the product of the terms present in the inverted and non-inverted form at its input.

*Number of programmable AND gates = Number of minterms in the expression (without repetition)*

**OR matrix**: An OR logic gate is designed to perform addition. Thus the OR matrix provides the addition of the input as the output.

*Number of programmable OR gate = Number of functions in the expression*

As we have already discussed that PLA realize an SOP function into a logic circuit. Thus a combination of AND matrix and OR matrix along with input buffer acts as the components of the Programmable Logic Array.

Now the question arises how can we implement any boolean function using PLA? So, let us now proceed towards the same.

## Implementation of Programmable Logic Array

Let us first see the steps for implementing an expression into a PLA:

- Consider the given boolean expression and reduce it to its minimum SOP form.
- Once the expression is reduced then firstly, form the connections of the input buffer.
- Further, we need to generate product terms, for which the desired input at the AND matrix must be provided.
- After forming the connections of AND matrix, proceed further and establish the connection for OR matrix.
- Lastly, program the PLA.

Let us now consider, an example to understand this in a better way.

Suppose the boolean expressions to be realized are as follows:

**Z _{1} = AB + A’B’C’ + A’BC’** and

** Z _{2} = A’B’C + A’BC’ + A’BC**

Now, firstly we need to simplify the above boolean expression. It is to be noted here that by simplifying, the number of product terms can be reduced to minimum. Thereby, producing less complex circuit.

So on simplifying the above boolean expression, we will get

**Z _{1} = AB + A’C’**

**Z _{2} = A’B’C + A’B**

Now, as we have already discussed that the number of input buffer will be equal to the total number of variables. And here we are having 3 variables. So, we will have 3 separate input buffer, one for each variable.

Now further the output of the input buffer must be provided to the AND matrix to have the desired product term.

The number of AND gates in the matrix will be equal to the number of minterms and that too without repetition. And here we are having 4 non-repetitive minterms. So total 4 AND gates must be present in the matrix.

Now the output of the AND gate must be provided to OR matrix to have the desired combinations of SOP.

The number of programmable OR gates in the matrix must be equal to the number of functions. And here we are having two functions thus we will have two OR gates.

Thus, for these expressions the logic circuit, comprising of programmable AND gate and programmable OR gate is given as:

Hence, in this way, a PLA is designed.

### Advantages of PLA

Programmable Logic Array offers easy implementation and thus consumes less time. Also, it supports easy detection and correction of errors. Along with this PLAs are quite inexpensive.

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